DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node using a retargetable com...
CODES
2007
IEEE
13 years 11 months ago
2007
IEEE
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
ISCA
2008
IEEE
13 years 11 months ago
2008
IEEE
Performance improvement solely through transistor scaling is becoming more and more difficult, thus it is increasingly common to see domain specific accelerators used in conjunc...
SBACPAD
2009
IEEE
13 years 11 months ago
2009
IEEE
RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...
SASP
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—One of the ways that custom instruction set extensions can improve over software execution is through the use of hardware structures that have been optimized at the arit...