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ISCAS
1999
IEEE
124views Hardware» more  ISCAS 1999»
10 years 5 months ago
Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity
Patrick Girard, Loïs Guiller, Christian Landr...
ISCAS
1999
IEEE
87views Hardware» more  ISCAS 1999»
10 years 5 months ago
Instruction level power model of microcontrollers
In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the s...
C. Chakrabarti, D. Gaitonde
ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
10 years 5 months ago
Test pattern generation for width compression in BIST
The main objectives of Built-In Self Test (BIST) are the design of test pattern generator circuits which achieve the highest fault coverage, require the shortest sequence of test ...
Paulo F. Flores, Horácio C. Neto, K. Chakra...
ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
10 years 5 months ago
Multi-objective design strategy for high-level low power design of DSP systems
High-level power design presents a complex, multiobjective problem that involves the simultaneous optimisation of competing criteria such as speed, area and power. It is difficult...
Mark S. Bright, Tughrul Arslan
ISCAS
1999
IEEE
72views Hardware» more  ISCAS 1999»
10 years 5 months ago
Shape-based sequential machine analysis
In this paper, the problem of determining if a given sequential specification can be made to fit a predetermined set of shape constraints is explored. Shape constraints are constr...
A. Crews, F. Brewer
ISCAS
1999
IEEE
78views Hardware» more  ISCAS 1999»
10 years 5 months ago
Cost-effective low-power architectures of video coding systems
A new low-power design technique, multirate, has been used along with other methods such as look-ahead, pipelining in designing the cost-effective low-power architectures of video...
Jie Chen, K. J. Ray Liu
ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
10 years 5 months ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...
ISCAS
1999
IEEE
134views Hardware» more  ISCAS 1999»
10 years 5 months ago
Low power DCT implementation approach for VLSI DSP processors
This paper presents an algorithm for the low power implementation of the Discrete Cosine Transform on Single multiplier CMOS DSPs. The algorithm reduces power by a combination of ...
S. Masupe, T. Arslan
ISCAS
1999
IEEE
110views Hardware» more  ISCAS 1999»
10 years 5 months ago
Noise-tolerant dynamic circuit design
-- Noise in deep submicron technology combined with the move towards dynamic circuit techniques for higher performance have raised concerns about reliability and energyefficiency o...
Lei Wang, Naresh R. Shanbhag
ISCAS
1999
IEEE
80views Hardware» more  ISCAS 1999»
10 years 5 months ago
A universal CMOS voltage interface circuit
Radu M. Secareanu, Eby G. Friedman, Juan Becerra, ...
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