ISCAS
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper reports the development of a low-power switchedcurrent algorithmic A/D converter based on a new algorithm, providing the bit conversion in three-cycles. The converter u...
ISCAS
1999
IEEE
13 years 9 months ago
1999
IEEE
The advent of portable and high-density devices has made power consumption a critical design concern. In this paper, we address the problem of reducing power consumption via gate-...
ISCAS
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper presents resource and latency constrained scheduling algorithms to minimize power/energy consumption when the resources operate at multiple voltages (5 V, 3.3 V,
ISCAS
1999
IEEE
13 years 9 months ago
1999
IEEE
Current mode (ECL) logic has long been the option of choice in those applications requiring logic functions at multigigahertz rates. This trend continues despite the obvious very ...
ISCAS
1999
IEEE
13 years 9 months ago
1999
IEEE
A signal su ers from nonlinear, linear, and additive distortion when transmitted through a channel. Linear equalizers are commonly used in receivers to compensate for linear chann...