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ISCAS
2005
IEEE
113views Hardware» more  ISCAS 2005»
13 years 10 months ago
The realization of a mismatch-free and 1.5-bit over-sampling pipelined ADC
Shigeto Tanaka, Yuji Gohda, Yasuhiro Sugimoto
ISCAS
2005
IEEE
187views Hardware» more  ISCAS 2005»
13 years 10 months ago
New cost-effective VLSI implementation of multiplierless FIR filter using common subexpression elimination
Abstract— In this paper, we propose a novel common subexpresson elimination (CSE) method to be used for VLSI design of multiplierless finite impulse response (FIR) filter with ...
Yasuhiro Takahashi, Michio Yokoyama
ISCAS
2005
IEEE
138views Hardware» more  ISCAS 2005»
13 years 10 months ago
Modeling of MOS transistors based on genetic algorithm and simulated annealing
— A novel method to extract the efficient model for Metal-Oxide-Semiconductor (MOS) transistors in order to satisfy a specific accuracy is presented. The approach presented here ...
Mohammad Taherzadeh-Sani, Ali Abbasian, Behnam Ame...
ISCAS
2005
IEEE
136views Hardware» more  ISCAS 2005»
13 years 10 months ago
Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders
— Low-Density Parity-Check Convolutional Codes (LDPC-CCs) are an attractive alternative to their block-oriented counterparts, LDPC-BCs. In this paper, we introduce these codes an...
Ramkrishna Swamy, Stephen Bates, Tyler L. Brandon
ISCAS
2005
IEEE
147views Hardware» more  ISCAS 2005»
13 years 10 months ago
A two-chip, 4-MHz, microelectromechanical reference oscillator
— The paper describes a 4-MHz temperature compensated reference oscillator based on a capacitive silicon micro-mechanical resonator. The design of the resonator has been optimize...
Krishnakumar Sundaresan, Paul S. Ho, Siavash Pourk...
ISCAS
2005
IEEE
159views Hardware» more  ISCAS 2005»
13 years 10 months ago
A low-power, 20-Gb/s continuous-time adaptive passive equalizer
—This paper describes a 20-Gb/s continuous-time adaptive passive equalizer utilizing on-chip lumped RLC components. Passive equalizers offer the advantages of higher bandwidth an...
Ruifeng Sun, Jaejin Park, Frank O'Mahony, C. Patri...
ISCAS
2005
IEEE
161views Hardware» more  ISCAS 2005»
13 years 10 months ago
A traffic aware, energy efficient MAC protocol for wireless sensor networks
— In this paper, we focus on the problem of designing an energy efficient MAC protocol for wireless sensor networks and propose a novel scheme, named as TEEM (Traffic aware, Ener...
Changsu Suh, Young-Bae Ko
ISCAS
2005
IEEE
96views Hardware» more  ISCAS 2005»
13 years 10 months ago
Synthesis of MITE log-domain filters with unique operating points
Abstract— Practical log-domain filter circuits might have multiple operating points in regions in which the translinear element does not obey the exponential law. In this paper,...
Shyam Subramanian, David V. Anderson, Paul E. Hasl...
ISCAS
2005
IEEE
177views Hardware» more  ISCAS 2005»
13 years 10 months ago
A combined two's complement and floating-point comparator
— This paper presents the design of a combined two’s complement and IEEE 754-compliant floating-point comparator. Unlike previous designs, this comparator incorporates both op...
James E. Stine, Michael J. Schulte
ISCAS
2005
IEEE
115views Hardware» more  ISCAS 2005»
13 years 10 months ago
A framework for the design of error-aware power-efficient fixed-width Booth multipliers
In this paper, a framework of designing a low-error and power-efficient two’s-complement fixed-width Booth multiplier that receives two n-bit numbers and produces an n-bit produ...
Min-An Song, Lan-Da Van, Chih-Chyau Yang, Shih-Chi...