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ISCAS
2005
IEEE
170views Hardware» more  ISCAS 2005»
13 years 10 months ago
Quantized LDPC decoder design for binary symmetric channels
Abstract— Binary Symmetric Channels (BSC) like the Interchip buses and the Intra-chip buses are gaining a lot of attention due to their widespread use with multimedia storage dev...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
ISCAS
2005
IEEE
101views Hardware» more  ISCAS 2005»
13 years 10 months ago
Parallel algorithm for hardware implementation of inverse halftoning
— A Parallel algorithm and its hardware implementation of Inverse Halftone operation is proposed in this paper. The algorithm is based on Lookup Tables from which the inverse hal...
Umair F. Siddiqi, Sadiq M. Sait, Aamir A. Farooqui
ISCAS
2005
IEEE
147views Hardware» more  ISCAS 2005»
13 years 10 months ago
A heuristic approach for multiple restricted multiplication
— This paper introduces a heuristic solution to the multiple restricted multiplication (MRM) optimization problem. MRM refers to a situation where a single variable is multiplied...
Nalin Sidahao, George A. Constantinides, Peter Y. ...
ISCAS
2005
IEEE
119views Hardware» more  ISCAS 2005»
13 years 10 months ago
Analysis of power consumption in VLSI global interconnects
Abstract— The analysis of effects induced by interconnects become increasingly important as the scale of process technologies steadily shrinks. While most analyses focus on the t...
Youngsoo Shin, Hyung-Ock Kim
ISCAS
2005
IEEE
117views Hardware» more  ISCAS 2005»
13 years 10 months ago
A VLSI model of the bat dorsal nucleus of the lateral lemniscus for azimuthal echolocation
— The dorsal nucleus of the lateral lemniscus (DNLL) is a distinct group of auditory cells that play a strategic role in azimuthal echolocation in the bat. Dominated by EI-type c...
Rock Z. Shi, Timothy K. Horiuchi
ISCAS
2005
IEEE
140views Hardware» more  ISCAS 2005»
13 years 10 months ago
A 16-bit low-power microcontroller with monolithic MEMS-LC clocking
Abstract—Low-power, single-chip integrated systems are prevailing in remote applications due to the increasing power and delay cost of inter-chip communication compared to on-chi...
Robert M. Senger, Eric D. Marsman, Michael S. McCo...
ISCAS
2005
IEEE
181views Hardware» more  ISCAS 2005»
13 years 10 months ago
Wide frequency range voltage controlled ring oscillators based on transmission gates
In this paper, a voltage-controlled ring oscillator (VCO) with wide linear tuning frequency range capability based on transmission gates is described. It also features the rapid v...
Meng-Lieh Sheu, Ta-Wei Lin, Wei-Hung Hsu
ISCAS
2005
IEEE
114views Hardware» more  ISCAS 2005»
13 years 10 months ago
Accurate high frequency noise modeling in SiGe HBTs
M. A. Selim, Aly E. Salama
ISCAS
2005
IEEE
106views Hardware» more  ISCAS 2005»
13 years 10 months ago
A generic multilevel multiplying D/A converter for pipelined ADCs
—State-of-art implementations of pipelined ADCs can only realize a multiplying DAC (MDAC) with (2n –1) levels. However, the number of levels needed to optimize the performance ...
Vivek Sharma, Un-Ku Moon, Gabor C. Temes
ISCAS
2005
IEEE
123views Hardware» more  ISCAS 2005»
13 years 10 months ago
Jitter limitations on multi-carrier modulation
—A feasibility study is made of an OFDM system based on analog multipliers and integrate-and-dump blocks, targeted at Gb/s copper interconnects. The effective amplitude variation...
Jan H. Rutger Schrader, Eric A. M. Klumperink, Jan...