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ISCAS
2005
IEEE
127views Hardware» more  ISCAS 2005»
13 years 11 months ago
A novel property of the second-order modes of discrete-time systems under variable transformation
Abstract— This paper derives a novel property of the secondorder modes of discrete-time systems under variable transformation. This is the generalization of the theory presented ...
Shunsuke Koshita, Masahide Abe, Masayuki Kawamata
ISCAS
2005
IEEE
142views Hardware» more  ISCAS 2005»
13 years 11 months ago
Fast region-of-interest transcoding for JPEG 2000 images
This paper presents a newly developed region-on-interest (ROI) transcoding method for JPEG 2000 images, which can be used for many progressive image/video streaming applications. ...
Hao-Song Kong, Anthony Vetro, Toshihiko Hata, Naok...
ISCAS
2005
IEEE
247views Hardware» more  ISCAS 2005»
13 years 11 months ago
Digital signal processing engine design for polar transmitter in wireless communication systems
Polar modulation techniques offer the capability of multimode wireless system and the potential for the high efficiency Power Amplifier (PA). This paper describes a new design of D...
Hung Yang Ko, Yi-Chiuan Wang, An-Yeu Wu
ISCAS
2005
IEEE
153views Hardware» more  ISCAS 2005»
13 years 11 months ago
A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher
—A high-throughput hardware architecture and FPGA implementation of the 64-bit NESSIE proposal, MISTY1 block cipher, is presented in this paper. This architecture, in contrast to...
Paris Kitsos, Michalis D. Galanis, Odysseas G. Kou...
ISCAS
2005
IEEE
113views Hardware» more  ISCAS 2005»
13 years 11 months ago
On the robustness of an analog VLSI implementation of a time encoding machine
Abstract— Time encoding is a mechanism for representing the information contained in a continuous time, bandlimited, analog signal as the zero-crossings of a binary signal. Time ...
Peter R. Kinget, Aurel A. Lazar, Laszlo T. Toth
ISCAS
2005
IEEE
129views Hardware» more  ISCAS 2005»
13 years 11 months ago
Cryptanalysis of a multistage encryption system
— This paper analyzes the security of a new multistage encryption system (MES) recently proposed in ISCAS’2004. It is found that MES is insecure against a differential chosenpl...
Chengqing Li, Xinxiao Li, Shujun Li, Guanrong Chen
ISCAS
2005
IEEE
142views Hardware» more  ISCAS 2005»
13 years 11 months ago
Hardware-based support vector machine classification in logarithmic number systems
—Support Vector Machines are emerging as a powerful machine-learning tool. Logarithmic Number Systems (LNS) utilize the property of logarithmic compression for numerical operatio...
Faisal M. Khan, Mark G. Arnold, William M. Potteng...
ISCAS
2005
IEEE
168views Hardware» more  ISCAS 2005»
13 years 11 months ago
Is home network application acceptable or not?
— Application of the home network is the most important factor to make the future home network environment pervasive. Although home network environment allows us to control appli...
Ikuo Keshi, Yumi Shiraishi, Hiroaki Niwamoto, Mino...
ISCAS
2005
IEEE
163views Hardware» more  ISCAS 2005»
13 years 11 months ago
A reconfigurable crossbar switch with adaptive bandwidth control for networks-on-chip
— We propose a new crossbar switch structure with adaptive bandwidth control. In a complex SoC design, the proposed crossbar switch efficiently incorporates various IPs with diff...
Donghyun Kim, Kangmin Lee, Se-Joong Lee, Hoi-Jun Y...
ISCAS
2005
IEEE
124views Hardware» more  ISCAS 2005»
13 years 11 months ago
Parallel FFT computation with a CDMA-based network-on-chip
— Fast Fourier transform (FFT) algorithms are used in a wide variety of digital signal processing applications and many of these require high-performance parallel implementations...
Daewook Kim, Manho Kim, Gerald E. Sobelman