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ISLPED
2004
ACM
123views Hardware» more  ISLPED 2004»
13 years 10 months ago
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes
Increasing demand for larger high-performance applications requires developing more complex systems with hundreds of processing cores on a single chip. To allow dynamic voltage sc...
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
ISLPED
2004
ACM
88views Hardware» more  ISLPED 2004»
13 years 10 months ago
Architecting voltage islands in core-based system-on-a-chip designs
Voltage islands enable core-level power optimization for Systemon-Chip (SoC) designs by utilizing a unique supply voltage for each core. Architecting voltage islands involves isla...
Jingcao Hu, Youngsoo Shin, Nagu R. Dhanwada, Radu ...
ISLPED
2004
ACM
122views Hardware» more  ISLPED 2004»
13 years 10 months ago
Microarchitectural techniques for power gating of execution units
Leakage power is a major concern in current and future microprocessor designs. In this paper, we explore the potential of architectural techniques to reduce leakage through power-...
Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan,...
ISLPED
2004
ACM
78views Hardware» more  ISLPED 2004»
13 years 10 months ago
Power-optimal pipelining in deep submicron technology
Seongmoo Heo, Krste Asanovic
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
13 years 10 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
ISLPED
2004
ACM
151views Hardware» more  ISLPED 2004»
13 years 10 months ago
Dynamic voltage and frequency scaling based on workload decomposition
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
ISLPED
2004
ACM
169views Hardware» more  ISLPED 2004»
13 years 10 months ago
Delay optimal low-power circuit clustering for FPGAs with dual supply voltages
This paper presents a delay optimal FPGA clustering algorithm targeting low power. We assume that the configurable logic blocks of the FPGA can be programmed using either a high s...
Deming Chen, Jason Cong
ISLPED
2004
ACM
108views Hardware» more  ISLPED 2004»
13 years 10 months ago
SEPAS: a highly accurate energy-efficient branch predictor
Designers have invested much effort in developing accurate branch predictors with short learning periods. Such techniques rely on exploiting complex and relatively large structure...
Amirali Baniasadi, Andreas Moshovos
ISLPED
2004
ACM
107views Hardware» more  ISLPED 2004»
13 years 10 months ago
Characterizing and modeling minimum energy operation for subthreshold circuits
Subthreshold operation is emerging as an energy-saving approach to many new applications. This paper examines energy minimization for circuits operating in the subthreshold region...
Benton H. Calhoun, Anantha Chandrakasan