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RECONFIG
2008
IEEE
224views VLSI» more  RECONFIG 2008»
10 years 3 months ago
Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGA
—We present algorithms for implementing large-scale regular expression matching (REM) on FPGA. Based on the proposed algorithms, we develop tools that first transform regular ex...
Yi-Hua E. Yang, Viktor K. Prasanna
RECONFIG
2008
IEEE
122views VLSI» more  RECONFIG 2008»
10 years 3 months ago
Embedded Harmonic Control for Trajectory Planning in Large Environments
This paper presents an embedded FPGA–based architecture to compute navigation trajectories along a harmonic potential. The goals and obstacles may be changed during computation....
Cesar Torres-Huitzil, Bernard Girau, Amine M. Boum...
RECONFIG
2008
IEEE
225views VLSI» more  RECONFIG 2008»
10 years 3 months ago
A Hardware Filesystem Implementation for High-Speed Secondary Storage
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
Ashwin A. Mendon, Ron Sass
RECONFIG
2008
IEEE
184views VLSI» more  RECONFIG 2008»
10 years 3 months ago
FPGA Implementation of an Elliptic Curve Cryptosystem over GF(3^m)
This paper describes an efficient arithmetic processor for elliptic curve cryptography. The proposed processor consists of special architectural components, the most important of...
Ilker Yavuz, Siddika Berna Ors Yalcin, Çeti...
RECONFIG
2008
IEEE
122views VLSI» more  RECONFIG 2008»
10 years 3 months ago
Using a CSP Based Programming Model for Reconfigurable Processor Arrays
The growing trend towards adoption of flexible and heterogeneous, parallel computing architectures has increased the challenges faced by the programming community. We propose a me...
Zain-ul-Abdin, Bertil Svensson
RECONFIG
2008
IEEE
268views VLSI» more  RECONFIG 2008»
10 years 3 months ago
Parametric, Secure and Compact Implementation of RSA on FPGA
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
Ersin Oksuzoglu, Erkay Savas
RECONFIG
2008
IEEE
198views VLSI» more  RECONFIG 2008»
10 years 3 months ago
High Performance Implementation of a Public Key Block Cipher - MQQ, for FPGA Platforms
– We have implemented in FPGA recently published class of public key algorithms – MQQ, that are based on quasigroup string transformations. Our implementation achieves decrypti...
Mohamed El-Hadedy, Danilo Gligoroski, Svein J. Kna...
RECONFIG
2008
IEEE
104views VLSI» more  RECONFIG 2008»
10 years 3 months ago
A Hybrid FPGA/Coarse Parallel Processing Architecture for Multi-modal Visual Feature Descriptors
Lars Baunegaard With Jensen, Anders Kjaer-Nielsen,...
RECONFIG
2008
IEEE
107views VLSI» more  RECONFIG 2008»
10 years 3 months ago
Fast Implementation of a Bio-inspired Model for Decentralized Gathering
In the context of the emergence of alternative computing resources to address the challenge of the upcoming end of Moore’s law, we consider the feasibility of gathering computat...
Bernard Girau, Cesar Torres-Huitzil
RECONFIG
2008
IEEE
140views VLSI» more  RECONFIG 2008»
10 years 3 months ago
Generalised Parallel Bilinear Interpolation Architecture for Vision Systems
Bilinear interpolation is widely used in computer vision for extracting pixel values for positions that lie off the pixel grid in an image. For each sub-pixel, the values of four ...
Suhaib A. Fahmy
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