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IAJIT
2010
150views more  IAJIT 2010»
13 years 3 months ago
Realization of a Novel Fault Tolerant Reversible Full Adder Circuit in Nanotechnology
: In parity preserving reversible circuit, the parity of the input vector must match the parity of the output vector. It renders a wide class of circuit faults readily detectable a...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
VLSID
2005
IEEE
124views VLSI» more  VLSID 2005»
13 years 11 months ago
Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder
In this paper, we have proposed a design technique for the reversible circuit of Binary Coded Decimal (BCD) adder. The proposed circuit has the ability to add two 4bits binary var...
Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury