Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder

In this paper, we have proposed a design technique for the reversible circuit of Binary Coded Decimal (BCD) adder. The proposed circuit has the ability to add two 4bits binary variables and it transforms the addition into the appropriate BCD number with efficient error correcting modules where the operations are reversible. We also show that the proposed design technique generates the reversible BCD adder circuit with minimum number of gates as well as the minimum number of garbage outputs.

• Type: Conference
• Year: 2005
• Where: VLSID
• Authors: Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury
• Keywords: Appropriate Bcd Number, Computer Architecture, Reversible Bcd Adder, Reversible Circuit, VLSID 2005