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ICCAD
1996
IEEE
102views Hardware» more  ICCAD 1996»
13 years 9 months ago
Bit-flipping BIST
A scan-based BIST scheme is presented which guarantees complete fault coverage with very low hardware overhead. A probabilistic analysis shows that the output of an LFSR which fee...
Hans-Joachim Wunderlich, Gundolf Kiefer
ITC
2000
IEEE
91views Hardware» more  ITC 2000»
13 years 9 months ago
A mixed mode BIST scheme based on reseeding of folding counters
In this paper a new scheme for deterministic and mixed mode scan-based BIST is presented. It relies on a new type of test pattern generator which resembles a programmable Johnson ...
Sybille Hellebrand, Hans-Joachim Wunderlich, Huagu...
GLVLSI
2003
IEEE
132views VLSI» more  GLVLSI 2003»
13 years 10 months ago
A highly regular multi-phase reseeding technique for scan-based BIST
In this paper a novel reseeding architecture for scan-based BIST, which uses an LFSR as TPG, is proposed. Multiple cells of the LFSR are utilized as sources for feeding the scan c...
Emmanouil Kalligeros, Xrysovalantis Kavousianos, D...