VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
Crosstalk noise in the clock network of digital circuits is often detected late in the design cycle, sometimes as late as after first silicon. It is therefore necessary to fix cros...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a g...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
State-of-the-art FPGA architectures have millions of gates in CLBs, Block RAMs, and Multiplier blocks which can host fairly large designs. While their physical design calls for oor...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
The robustness of engines for ATPG has to be improved to cope with the growing size of circuits. Recently, SAT-based ATPG approaches have been shown to be very robust even on larg...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE