JUCS
2007
13 years 4 months ago
2007
: This article presents an architecture that encrypts data with the AES algorithm. This architecture can be implemented on the Xilinx Virtex II FPGA family, by applying pipelining ...
DSD
2006
IEEE
13 years 8 months ago
2006
IEEE
In this paper, we present profiling results of the Bluetooth standard implemented on the Xilinx Virtex II Pro device. The investigation is performed in two stages. First, we solel...
FCCM
2004
IEEE
13 years 8 months ago
2004
IEEE
We present a prototype design of the MOLEN polymorphic processor, a CCM based on the co-processor architectural paradigm. The Xilinx Virtex II Pro technology is used as a prototyp...
CSB
2004
IEEE
13 years 8 months ago
2004
IEEE
We describe a novel hardware architecture for genomic and proteomic sequence alignment which achieves a speed-up of two to three orders of magnitude over Smith-Waterman dynamic pr...
FPL
2005
Springer
13 years 10 months ago
2005
Springer
This paper presents a DES/3DES core that will support Cipher Block Chaining (CBC) and also has a built in keygen that together take up about 10% of the resources in a Xilinx Virte...