121
Voted
DELTA
2006
IEEE
15 years 6 months ago
2006
IEEE
The difficulties of designing nanoscale circuits include the need for regular circuit structure and controlling the timing requirements. A cellular array has highly regular struct...
126
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DELTA
2006
IEEE
15 years 6 months ago
2006
IEEE
The mapping of image processing algorithms to hardware is complicated by several hardware constraints including limited processing time, limited access to data and limited resourc...
169
click to vote
DELTA
2006
IEEE
15 years 6 months ago
2006
IEEE
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
152
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DEEC
2006
IEEE
15 years 6 months ago
2006
IEEE
Abstract. Engineering workflow applications are becoming more and more complex, involving numerous interacting business objects within considerable processes. Analysing the interac...
DDECS
2006
IEEE
15 years 6 months ago
2006
IEEE
