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122
Voted
CASES
2006
ACM
15 years 7 months ago
Improving the performance and power efficiency of shared helpers in CMPs
Technology scaling trends have forced designers to consider alternatives to deeply pipelining aggressive cores with large amounts of performance accelerating hardware. One alterna...
Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi...
114
Voted
DATE
2004
IEEE
106views Hardware» more  DATE 2004»
15 years 7 months ago
Realizable Reduction for Electromagnetically Coupled RLMC Interconnects
This paper presents a realizable RLMC1 reduction algorithm for extracted interconnect circuits based on two effective approaches: RL branch reduction and RC/LC node reduction. Our...
Rong Jiang, Charlie Chung-Ping Chen
166
Voted
CASES
2006
ACM
15 years 7 months ago
High-performance packet classification algorithm for many-core and multithreaded network processor
Packet classification is crucial for the Internet to provide more value-added services and guaranteed quality of service. Besides hardware-based solutions, many software-based cla...
Duo Liu, Bei Hua, Xianghui Hu, Xinan Tang
101
Voted
DATE
2004
IEEE
118views Hardware» more  DATE 2004»
15 years 7 months ago
SCORE: SPICE COmpatible Reluctance Extraction
Presently, a necessary modification to mainstream analysis tools prevents the direct application of reluctance k. In this paper, we propose a reluctance realization algorithm (RRA...
Rong Jiang, Charlie Chung-Ping Chen
CASES
2006
ACM
15 years 7 months ago
Efficient architectures through application clustering and architectural heterogeneity
Customizing architectures for particular applications is a promising approach to yield highly energy-efficient designs for embedded systems. This work explores the benefits of arc...
Lukasz Strozek, David Brooks