Sciweavers

AMAST
2006
Springer
15 years 7 months ago
A Computational Group Theoretic Symmetry Reduction Package for the Spin Model Checker
Abstract. Symmetry reduced model checking is hindered by two problems: how to identify state space symmetry when systems are not fully symmetric, and how to determine equivalence o...
Alastair F. Donaldson, Alice Miller
AMAST
2006
Springer
15 years 7 months ago
State Space Reduction of Rewrite Theories Using Invisible Transitions
Abstract. State space explosion is the hardest challenge to the effective application of model checking methods. We present a new technique for achieving drastic state space reduct...
Azadeh Farzan, José Meseguer
ASPDAC
2004
ACM
144views Hardware» more  ASPDAC 2004»
15 years 7 months ago
Verification of timed circuits with symbolic delays
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
Robert Clarisó, Jordi Cortadella
ASPDAC
2004
ACM
79views Hardware» more  ASPDAC 2004»
15 years 7 months ago
NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO
Abstract--A parasitic-aware RF synthesis tool based on a nondominated sorting genetic algorithm (NSGA) is introduced. The NSGA-based optimizer casts the design problem as a multi-o...
Min Chu, David J. Allstot, Jeffrey M. Huard, Kim Y...
ASPDAC
2004
ACM
79views Hardware» more  ASPDAC 2004»
15 years 7 months ago
Priority assignment optimization for minimization of current surge in high performance power efficient clock-gated microprocesso
Abstract - We propose an integrated archltectural/physicdplanning approach named priority assignment optimization to mioimize the current surge in high performance power eifkient c...
Yiran Chen, Kaushik Roy, Cheng-Kok Koh