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ICCAD
2007
IEEE
234views Hardware» more  ICCAD 2007»
15 years 8 months ago
Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors
Abstract: Polynomial computations over fixed-size bitvectors are found in many practical datapath designs. For efficient RTL synthesis, it is important to identify good decompositi...
Sivaram Gopalakrishnan, Priyank Kalla, M. Brandon ...
ICCAD
2007
IEEE
109views Hardware» more  ICCAD 2007»
15 years 8 months ago
CacheCompress: a novel approach for test data compression with cache for IP embedded cores
Abstract-- In this paper, we propose a novel test data compression technique named CacheCompress, which combines selective encoding and dynamic dictionary based encoding. Depending...
Hao Fang, Chenguang Tong, Bo Yao, Xiaodi Song, Xu ...
ICCAD
2007
IEEE
151views Hardware» more  ICCAD 2007»
15 years 8 months ago
A design flow dedicated to multi-mode architectures for DSP applications
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
Cyrille Chavet, Caaliph Andriamisaina, Philippe Co...
ICCAD
2007
IEEE
91views Hardware» more  ICCAD 2007»
15 years 8 months ago
Sizing and placement of charge recycling transistors in MTCMOS circuits
Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram
GLOBECOM
2009
IEEE
15 years 8 months ago
On-Chip Integrated Antenna Structures in CMOS for 60 GHz WPAN Systems
Abstract--This paper presents several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for w...
Felix Gutierrez Jr., Kristen Parrish, Theodore S. ...