Sciweavers

DAC
2010
ACM
15 years 8 months ago
Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms
We present a methodology for off-chip memory bandwidth minimization through application-driven L2 cache partitioning in multicore systems. A major challenge with multi-core system...
Chenjie Yu, Peter Petrov
DAC
2010
ACM
15 years 8 months ago
Cost-driven 3D integration with interconnect layers
The ever increasing die area of Chip Multiprocessors (CMPs) affects manufacturing yield, resulting in higher manufacture cost. Meanwhile, network-on-chip (NoC) has emerged as a p...
Xiaoxia Wu, Guangyu Sun, Xiangyu Dong, Reetuparna ...
DAC
2010
ACM
15 years 8 months ago
Lattice-based computation of Boolean functions
This paper studies the implementation of Boolean functions with lattices of two-dimensional switches. Each switch is controlled by a Boolean literal. If the literal is 1, the swit...
Mustafa Altun, Marc D. Riedel
CSFW
2010
IEEE
15 years 8 months ago
Required Information Release
Abstract—Many computer systems have a functional requirement to release information. Such requirements are an important part of a system’s information security requirements. Cu...
Stephen Chong