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DAC
2007
ACM
15 years 9 months ago
Design for Verification in System-level Models and RTL
It has long been the practice to create models in C or C++ for architectural studies, software prototyping and RTL verification in the design of Systems-on-Chip (SoC). It is often...
Anmol Mathur, Venkat Krishnaswamy
DAC
2007
ACM
15 years 9 months ago
A Framework for the Validation of Processor Architecture Compliance
We present a framework for validating the compliance of a design with a given architecture. Our approach is centered on the concept of misinterpretations. These include missing be...
Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jae...
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DAC
2007
ACM
15 years 9 months ago
Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew
With the continuous increase of circuit density, interconnect length, and aspect ratio, the influence of capacitive and inductive coupling on timing characteristics of integrated ...
Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury
DAC
2007
ACM
15 years 9 months ago
A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices
The number of features that are supported in modern multimedia devices is increasing faster than ever. Estimating the performance of such applications when they are running on sha...
Akash Kumar, Bart Mesman, Henk Corporaal, Bart D. ...
DAC
2007
ACM
15 years 9 months ago
Skewed Flip-Flop Transformation for Minimizing Leakage in Sequential Circuits
Mixed Vt has been widely used to control leakage without affecting circuit performance. However, current approaches target the combinational circuits even though sequential elemen...
Jun Seomun, Jaehyun Kim, Youngsoo Shin