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63
Voted
ASPDAC
2015
ACM
15views Hardware» more  ASPDAC 2015»
9 years 11 months ago
A retargetable and accurate methodology for logic-IP-internal electromigration assessment
— A new methodology for SoC-level logic-IP-internal EM verification is presented, which provides an on-the-fly retargeting capability for reliability constraints. This flexibilit...
Palkesh Jain, Sachin S. Sapatnekar, Jordi Cortadel...
78
Voted
ASPDAC
2015
ACM
19views Hardware» more  ASPDAC 2015»
9 years 11 months ago
Incremental Latin hypercube sampling for lifetime stochastic behavioral modeling of analog circuits
—In advanced technology node, not only process variations but also aging effects have critical impacts on circuit performance. Most of existing works consider process variations ...
Yen-Lung Chen, Wei Wu, Chien-Nan Jimmy Liu, Lei He
79
Voted
ASPDAC
2015
ACM
9views Hardware» more  ASPDAC 2015»
9 years 11 months ago
Heterogeneous architecture design with emerging 3D and non-volatile memory technologies
—Energy becomes the primary concern in nowadays multi-core architecture designs. Moore’s law predicts that the exponentially increasing number of cores can be packed into a sin...
Qiaosha Zou, Matthew Poremba, Rui He, Wei Yang, Ju...
66
Voted
ASPDAC
2015
ACM
3views Hardware» more  ASPDAC 2015»
9 years 11 months ago
Vulnerability analysis for crypto devices against probing attack
Probing attack is a severe threat for the security of hardware cryptographic modules (HCMs). In this paper, we make the first step to evaluate the vulnerability of HCMs against p...
Lingxiao Wei, Jie Zhang, Feng Yuan, Yannan Liu, Ju...
69
Voted
ASPDAC
2015
ACM
6views Hardware» more  ASPDAC 2015»
9 years 11 months ago
Layout decomposition co-optimization for hybrid e-beam and multiple patterning lithography
—As the feature size keeps scaling down and the circuit complexity increases rapidly, a more advanced hybrid lithography, which combines multiple patterning and e-beam lithograph...
Yunfeng Yang, Wai-Shing Luk, Hai Zhou, Changhao Ya...