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HPCA
2003
IEEE

Caches and Hash Trees for Efficient Memory Integrity

14 years 7 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications such as certified program execution. A number of schemes are presented with different levels of integration between the on-processor L2 cache and the hash-tree machinery. Simulations show that for the best of our methods, the performance overhead is less than 25%, a significant decrease from the 10? overhead of a naive implementation.
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2003
Where HPCA
Authors Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, Marten van Dijk, Srinivas Devadas
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