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GLVLSI
2007
IEEE

Combinational equivalence checking for threshold logic circuits

13 years 8 months ago
Combinational equivalence checking for threshold logic circuits
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (current mode, differential mode circuits), as well as the promise they hold for the future nano devices (RTDs, SETs, QCAs and other nano devices). This has generated renewed interest in the design automation community to design efficient CAD tools for threshold logic. Recently a lot of work has been done to synthesize threshold logic circuits. So far there has been no efficient method to verify the synthesized circuits. In this work we address the problem of combinational equivalence checking for threshold circuits. We propose a new algorithm, to obtain compact functional representation of threshold elements. We give the proof of correctness, and analyze its runtime complexity. We use this polynomial time algorithm to develop a new methodology to verify threshold circuits. We report the result of our experim...
Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevo
Added 02 Jun 2010
Updated 02 Jun 2010
Type Conference
Year 2007
Where GLVLSI
Authors Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevod
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