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FDL
2004
IEEE

Designing for dynamic partially reconfigurable FPGAs with SystemC and OSSS

13 years 6 months ago
Designing for dynamic partially reconfigurable FPGAs with SystemC and OSSS
This paper presents a new approach to design embedded systems based on dynamic partial reconfigurable FPGAs. The approach is intended to allow designing of systems with runtime reconfiguration without explicit specification by the designer. The design entry point is the HDL OSSS, a SystemC extension allowing for synthesizable object orientation and polymorphism.
Andreas Schallenberg, Frank Oppenheimer, Wolfgang
Added 20 Aug 2010
Updated 20 Aug 2010
Type Conference
Year 2004
Where FDL
Authors Andreas Schallenberg, Frank Oppenheimer, Wolfgang Nebel
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