Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

14

ESTIMEDIA
2006
Springer

favoriteEmaildiscussreport

78views Multimedia» more ESTIMEDIA 2006»

An Estimation Methodology for Designing Instruction Cache Memory of Embedded Systems

13 years 10 months ago

An Estimation Methodology for Designing Instruction Cache Memory of Embedded Systems

Download peace.snu.ac.kr

Nikolas Kroupis, Stylianos Mamagkakis, Dimitrios S

Real-time Traffic

ESTIMEDIA 2006 | Multimedia |

claim paper

Related Content

» An efficient direct mapped instruction cache for applicationspecific embedded systems

» WCETcentric partial instruction cache locking

» Compiletime decided instruction cache locking using worstcase execution paths

» Latency and bandwidth efficient communication through system customization for embedded mu...

» Softwarebased instruction caching for embedded processors

» A DVSbased pipelined reconfigurable instruction memory

» Tuning of Loop Cache Architectures to Programs in Embedded System Design

» A novel instruction scratchpad memory optimization method based on concomitance metric

» Code Compression for Embedded Systems

Post Info
More Details (n/a)

Added	22 Aug 2010
Updated	22 Aug 2010
Type	Conference
Year	2006
Where	ESTIMEDIA
Authors	Nikolas Kroupis, Stylianos Mamagkakis, Dimitrios Soudris

Comments (0)