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HPCA
2007
IEEE

Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications

15 years 16 days ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of power dissipation and complexity. Current chip multiprocessors increase throughput by utilizing multiple cores to perform computation in parallel. These designs provide real benefits for server-class applications that are explicitly multi-threaded. However, for desktop and other systems where single-thread applications dominate, multicore systems have yet to offer much benefit. Chip multiprocessors are most efficient at executing coarse-grain threads that have little communication. However, general-purpose applications do not provide many opportunities for identifying such threads, due to frequent use of pointers, recursive data structures, if-then-else branches, small function bodies, and loops with small trip counts. To attack this mismatch, this paper proposes a multicore architecture, referred to as Voltron, ...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2007
Where HPCA
Authors Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlke
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