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FDL
2005
IEEE

Hardware Synthesis of Parallel Machines from SystemC

14 years 1 months ago
Hardware Synthesis of Parallel Machines from SystemC
Heterogeneous system specifications implicitly assume parallel execution of their components that rely on supporting platform architectures and operating systems. Unfortunately, concurrency and ization at high level of abstraction must be drastically refined to obtain synthesizable hardware descriptions. In this paper an experiment on synthesizing hardware with parallel microtures from SystemC specifications is done in order to determine the highest abstraction level at which designers can work. As a result, refinement techniques and specifications guidelines are presented.
Antoni Portero, Lluis Ribas, Jordi Carrabina
Added 24 Jun 2010
Updated 24 Jun 2010
Type Conference
Year 2005
Where FDL
Authors Antoni Portero, Lluis Ribas, Jordi Carrabina
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