Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

100

ARVLSI
1997
IEEE

138views VLSI» more ARVLSI 1997»

Kestrel: Design of an 8-bit SIMD Parallel Processor

15 years 6 months ago

Kestrel: Design of an 8-bit SIMD Parallel Processor

Download users.soe.ucsc.edu

David M. Dahle, Jeffrey D. Hirschberg, Kevin Karpl

Real-time Traffic

ARVLSI 1997 | VLSI |

claim paper

Related Content

» Kestrel A Programmable Array for Sequence Analysis

» A versatile computation module for adaptable multimedia processors

» Mightymorphing powerSIMD

» Design of a Massively Parallel Vision Processor based on MultiSIMD Architecture

» From SODA to scotch The evolution of a wireless baseband processor

» Revisiting SIMD Programming

» Limitations of specialpurpose instructions for similarity measurements in media SIMD exten...

» FPGAbased SIMD Processor

» DynamicSIMD for lens distortion compensation

Post Info
More Details (n/a)

Added	25 Aug 2010
Updated	25 Aug 2010
Type	Conference
Year	1997
Where	ARVLSI
Authors	David M. Dahle, Jeffrey D. Hirschberg, Kevin Karplus, Hansjörg Keller, Eric Rice, Don Speck, Douglas H. Williams, Richard Hughey

Comments (0)