Processor-time-optimal systolic arrays

13 years 4 months ago
Processor-time-optimal systolic arrays
Minimizing the amount of time and number of processors needed to perform an application reduces the application's fabrication cost and operation costs. A directed acyclic graph (dag) model of algorithms is used to de ne a time-minimal schedule and a processor-time-minimal schedule. We present a technique for nding a lower bound on the number of processors needed to achieve a given schedule of an algorithm. The application of this technique is illustrated with a tensor product computation. We then apply the technique to the free schedule of algorithms for matrix product, Gaussian elimination, and transitive closure. For each, we provide a timeminimal processor schedule that meets these processor lower bounds, including the one for tensor product.
Peter R. Cappello, Ömer Egecioglu, Chris J. S
Added 19 Dec 2010
Updated 19 Dec 2010
Type Journal
Year 2000
Authors Peter R. Cappello, Ömer Egecioglu, Chris J. Scheiman
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