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ICPADS
2006
IEEE

SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors

13 years 8 months ago
SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors
One of the major factors that can potentially slow down widespread use of embedded chip multiprocessors is lack of efficient software support. In particular, automated code parallelizers are badly needed since it is not realistic to expect an average programmer to parallelize a large complex embedded application over multiple processors, taking into account several factors at the same time such as code density, data locality, performance, power and code resilience. Especially, increasing use of software-managed SPM (scratch-pad memory) components in embedded systems require an SPM conscious code parallelization. Motivated by this observation, this paper proposes a novel compiler-based SPM conscious loop scheduling strategy for array/loop based embedded applications. This strategy tries to achieve two objectives. First, the sets of loop iterations assigned to different processors should approximately take the same amount of time to finish. Second, the set of iterations assigned to a ...
Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Tayl
Added 11 Jun 2010
Updated 11 Jun 2010
Type Conference
Year 2006
Where ICPADS
Authors Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Taylan Yemliha
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