Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

72

DAC
1997
ACM

favoriteEmaildiscussreport

77views Computer Architecture» more DAC 1997»

Timing Optimization for Multi-Source Nets: Characterization and Optimal Repeater Insertion

15 years 1 months ago

Timing Optimization for Multi-Source Nets: Characterization and Optimal Repeater Insertion

Download www.cs.uic.edu

John Lillis, Chung-Kuan Cheng

Real-time Traffic

Computer Architecture | DAC 1997 |

claim paper

Related Content

» SpecBased Repeater Insertion and Wire Sizing for Onchip Interconnect

» Repeater Insertion for TwoTerminal Nets in ThreeDimensional Integrated Circuits

» NoiseAware Repeater Insertion and WireSizing for OnChip Interconnect Using Hierarchical Mo...

Post Info
More Details (n/a)

Added	06 Aug 2010
Updated	06 Aug 2010
Type	Conference
Year	1997
Where	DAC
Authors	John Lillis, Chung-Kuan Cheng

Comments (0)