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FCCM
2002
IEEE

Using On-Chip Configurable Logic to Reduce Embedded System Software Energy

14 years 3 months ago
Using On-Chip Configurable Logic to Reduce Embedded System Software Energy
We examine the energy savings possible by re-mapping critical software loops from a microprocessor to configurable logic appearing on the same-chip in commodity chips now commercially available. That logic is typically intended to implement peripherals and coprocessors without increasing chip count – but we show that reduced software energy is an additional benefit, making such chips even more useful. We find critical software loops and re-implement them in the configurable logic such that a repeating software task completes sooner, allowing us to put the system in a low-power state for longer periods, thus reducing energy. We use simulations and estimations for a hypothetical device having a 32-bit MIPS processor plus configurable logic, yielding energy savings of 25%, increasing to 39% assuming voltage scaling. We physically measured several examples running on two commercial single-chip devices having an 8-bit 8051 microprocessor plus configurable logic and a 32-bit ARM microproc...
Greg Stitt, Brian Grattan, Jason R. Villarreal, Fr
Added 14 Jul 2010
Updated 14 Jul 2010
Type Conference
Year 2002
Where FCCM
Authors Greg Stitt, Brian Grattan, Jason R. Villarreal, Frank Vahid
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