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114
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LCTRTS
2004
Springer
15 years 6 months ago
Feedback driven instruction-set extension
Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. ...
Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael ...
WSC
1997
15 years 2 months ago
Efficient Instruction Cache Simulation and Execution Profiling with a Threaded-Code Interpreter
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
Peter S. Magnusson
92
Voted
FAST
2009
14 years 10 months ago
Dynamic Resource Allocation for Database Servers Running on Virtual Storage
We introduce a novel multi-resource allocator to dynamically allocate resources for database servers running on virtual storage. Multi-resource allocation involves proportioning t...
Gokul Soundararajan, Daniel Lupei, Saeed Ghanbari,...
104
Voted
TC
2011
14 years 7 months ago
Software-Based Cache Coherence with Hardware-Assisted Selective Self-Invalidations Using Bloom Filters
— Implementing shared memory consistency models on top of hardware caches gives rise to the well-known cache coherence problem. The standard solution involves implementing cohere...
Thomas J. Ashby, Pedro Diaz, Marcelo Cintra
ICDM
2010
IEEE
125views Data Mining» more  ICDM 2010»
14 years 10 months ago
Topic Modeling Ensembles
: Topic Modeling Ensembles Zhiyong Shen, Ping Luo, Shengwen Yang, Xukun Shen HP Laboratories HPL-2010-158 Topic model, Ensemble In this paper we propose a framework of topic model...
Zhiyong Shen, Ping Luo, Shengwen Yang, Xukun Shen