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ISCA
2011
IEEE
229views Hardware» more  ISCA 2011»
14 years 3 months ago
TLSync: support for multiple fast barriers using on-chip transmission lines
As the number of cores on a single-chip grows, scalable barrier synchronization becomes increasingly difficult to implement. In software implementations, such as the tournament ba...
Jungju Oh, Milos Prvulovic, Alenka G. Zajic
ACCV
2007
Springer
15 years 6 months ago
Finding Camera Overlap in Large Surveillance Networks
Abstract. Recent research on video surveillance across multiple cameras has typically focused on camera networks of the order of 10 cameras. In this paper we argue that existing sy...
Anton van den Hengel, Anthony R. Dick, Henry Detmo...
SIAMSC
2010
194views more  SIAMSC 2010»
14 years 10 months ago
A Multilevel Algorithm for Simultaneously Denoising and Deblurring Images
In this paper, we develop a fast multilevel algorithm for simultaneously denoising and deblurring images under the total variation regularization. Although much effort has been de...
Raymond H. Chan, Ke Chen 0002
FPL
2005
Springer
172views Hardware» more  FPL 2005»
15 years 5 months ago
An FPGA Network Architecture for Accelerating 3DES - CBC
This paper presents a DES/3DES core that will support Cipher Block Chaining (CBC) and also has a built in keygen that together take up about 10% of the resources in a Xilinx Virte...
Chin Mun Wee, Peter R. Sutton, Neil W. Bergmann
BMCBI
2011
14 years 6 months ago
Using Stochastic Causal Trees to Augment Bayesian Networks for Modeling eQTL Datasets
Background: The combination of genotypic and genome-wide expression data arising from segregating populations offers an unprecedented opportunity to model and dissect complex phen...
Kyle C. Chipman, Ambuj K. Singh