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ERSA
2008
130views Hardware» more  ERSA 2008»
15 years 1 months ago
Evaluation of MuCCRA-D: A Dynamically Reconfigurable Processor with Directly Interconnected PEs
Coarse-grained dynamically reconfigurable processor arrays (DRPAs) have been received an attention as a flexible and efficient off-loading engine for various types of System-on-Ch...
Masaru Kato, Yohei Hasegawa, Hideharu Amano
HUC
2007
Springer
15 years 5 months ago
A Long-Term Evaluation of Sensing Modalities for Activity Recognition
We study activity recognition using 104 hours of annotated data collected from a person living in an instrumented home. The home contained over 900 sensor inputs, including wired r...
Beth Logan, Jennifer Healey, Matthai Philipose, Em...
LCN
2003
IEEE
15 years 5 months ago
Evaluating System Performance in Gigabit Networks
- With the current wide deployment of Gigabit Ethernet technology in the backbone and workgroup switches, the network performance bottleneck has shifted for the first time in nearl...
Khaled Salah, K. El-Badawi
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
15 years 5 months ago
Comparing Analytical Modeling with Simulation for Network Processors: A Case Study
Programming network processors remains an art due to the variety of different network processor architectures and due to little support to reason and explore implementations on su...
Matthias Gries, Chidamber Kulkarni, Christian Saue...
PDP
2010
IEEE
15 years 6 months ago
Impact of Parallel Workloads on NoC Architecture Design
— Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, manycore chips demand new interconnection strategies, since traditio...
Henrique Cota de Freitas, Lucas Mello Schnorr, Mar...