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ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
15 years 5 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
CCR
2008
120views more  CCR 2008»
14 years 11 months ago
OpenFlow: enabling innovation in campus networks
This whitepaper proposes OpenFlow: a way for researchers to run experimental protocols in the networks they use every day. OpenFlow is based on an Ethernet switch, with an interna...
Nick McKeown, Tom Anderson, Hari Balakrishnan, Gur...
84
Voted
SC
2009
ACM
15 years 6 months ago
Allocator implementations for network-on-chip routers
The present contribution explores the design space for virtual channel (VC) and switch allocators in network-on-chip (NoC) routers. Based on detailed RTL-level implementations, we...
Daniel U. Becker, William J. Dally
TCAD
2008
101views more  TCAD 2008»
14 years 11 months ago
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
GLOBECOM
2007
IEEE
15 years 6 months ago
GMPLS-Based Hybrid 1+N Link Protection Over p-Cycles: Design and Performance
—In [1], the author introduced a strategy to use network coding on p-Cycles in order to provide 1+N protection for straddling connections and links against single link failures i...
Ahmed E. Kamal