150 search results - page 17 / 30 » A 64-bit stream processor architecture for scientific applic... |
ISNN
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. Artificial Neural Networks (ANNs) and image processing requires massively parallel computation of simple operator accompanied by heavy memory access. Thus, this type of ...
ISCA
1994
IEEE
15 years 1 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
ARCS
2008
Springer
14 years 11 months ago
2008
Springer
: The architecture of the IBM Cell BE processor represents a new approach for designing CPUs. The fast execution of legacy software has to stand back in order to achieve very high ...
HPCA
2002
IEEE
15 years 10 months ago
2002
IEEE
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
ASPLOS
2009
ACM
15 years 4 months ago
2009
ACM
This paper explores the architectural implications of integrating computation and molecular probes to form nanoscale sensor processors (nSP). We show how nSPs may enable new compu...