54 search results - page 8 / 11 » A Bus Delay Reduction Technique Considering Crosstalk |
66
Voted
ISQED
2006
IEEE
15 years 3 months ago
2006
IEEE
Gate-length biasing is a runtime leakage reduction technique that leverages on the short-channel effect by marginally increasing the gate-length of MOS devices to significantly ...
ISCA
1994
IEEE
15 years 1 months ago
1994
IEEE
Wepresentaunijiedapp?'each to assess thet7adeoff of architecture techniques that affect mean memory access time. The architectural features we consider inciude cache hit Tati...
GLVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
Repeaters are often used to drive high impedance interconnects. These lines have become highly inductive and can affect signal behavior. The line inductance should therefore be co...
INFOCOM
2010
IEEE
14 years 8 months ago
2010
IEEE
—In-network aggregation has become a promising technique for improving the energy efficiency of wireless sensor networks. Aggregating data at various nodes in the network result...
VLSID
2006
IEEE
15 years 10 months ago
2006
IEEE
For a nanoCMOS of sub-65nm technology, where the gate oxide (SiO2) thickness is very low, the gate leakage is one of the major components of power dissipation. In this paper, we pr...