1404 search results - page 71 / 281 » A C to Hardware Software Compiler |
197
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CODES
2009
IEEE
16 years 27 days ago
2009
IEEE
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
164
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PLDI
2000
ACM
15 years 10 months ago
2000
ACM
We describe the design and implementation of Dynamo, a software dynamic optimization system that is capable of transparently improving the performance of a native instruction stre...
154
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CAINE
2006
15 years 7 months ago
2006
The synergy of software and hardware leads to efficient application expression profile (AEP) not only in terms of execution time and energy but also optimal architecture usage. We...
173
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MICRO
1997
IEEE
15 years 10 months ago
1997
IEEE
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
151
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CODES
2005
IEEE
15 years 11 months ago
2005
IEEE
The performance of virtual machines (e.g., Java Virtual Machines—JVMs) can be significantly improved when critical code sections (e.g., Java bytecode methods) are migrated from...