158 search results - page 15 / 32 » A CP Scheduler for High-Performance Computers |
105
Voted
HPCA
1996
IEEE
15 years 5 months ago
1996
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
91
Voted
ICNP
2003
IEEE
15 years 6 months ago
2003
IEEE
Practical crossbar scheduling algorithms for CIOQ switches such as PIM and ¢ -SLIP, can perform poorly under extreme traffic conditions, frequently failing to be workconserving....
92
Voted
HPDC
2003
IEEE
15 years 6 months ago
2003
IEEE
Divisible workload applications arise in many fields of science and engineering. They can be parallelized in master-worker fashion and relevant scheduling strategies have been pr...
91
Voted
CISIM
2008
IEEE
15 years 7 months ago
2008
IEEE
Multiprocessors have emerged as a powerful computing means for running real-time applications, especially where a uniprocessor system would not be sufficient enough to execute all...
110
Voted
CCGRID
2001
IEEE
15 years 4 months ago
2001
IEEE
High performance computing on parallel architectures currently uses different approaches depending on the hardory model of the architecture, the abstraction level of the programmi...