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» A Calculus and logic of resources and processes
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DAC
2006
ACM
15 years 10 months ago
Rapid estimation of control delay from high-level specifications
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...
Gagan Raj Gupta, Madhur Gupta, Preeti Ranjan Panda
IEEEPACT
2009
IEEE
15 years 4 months ago
DDCache: Decoupled and Delegable Cache Data and Metadata
Abstract—In order to harness the full compute power of manycore processors, future designs must focus on effective utilization of on-chip cache and bandwidth resources. In this p...
Hemayet Hossain, Sandhya Dwarkadas, Michael C. Hua...
ICNSC
2007
IEEE
15 years 4 months ago
Adaptive Network Flow Clustering
— Flow level measurements are used to provide insights into the traffic flow crossing a network link. However, existing flow based network detection devices lack adaptive reconfi...
Sui Song, Zhixiong Chen
FPL
2005
Springer
137views Hardware» more  FPL 2005»
15 years 3 months ago
Bitwise Optimised CAM for Network Intrusion Detection Systems
String pattern matching is a computationally expensive task, and when implemented in hardware, it can consume a large amount of resources for processing and storage. This paper pr...
Sherif Yusuf, Wayne Luk
ICPPW
2003
IEEE
15 years 3 months ago
Security Aspects of Wireless Heterogeneous Databases - Protocol, Performance, and Energy Analysis
Users have been demanding information “anytime, anywhere”. The notion of accessing diverse and autonomous information repositories with different APIs is not accepted. This ha...
Harshal Haridas, Ali R. Hurson, Yu Jiao