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CAV
2005
Springer
173views Hardware» more  CAV 2005»
15 years 10 months ago
Building Your Own Software Model Checker Using the Bogor Extensible Model Checking Framework
Model checking has proven to be an effective technology for verification and debugging in hardware and more recently in software domains. We believe that recent trends in both th...
Matthew B. Dwyer, John Hatcliff, Matthew Hoosier, ...
IPPS
2008
IEEE
15 years 11 months ago
Design of scalable dense linear algebra libraries for multithreaded architectures: the LU factorization
The scalable parallel implementation, targeting SMP and/or multicore architectures, of dense linear algebra libraries is analyzed. Using the LU factorization as a case study, it is...
Gregorio Quintana-Ortí, Enrique S. Quintana...
126
Voted
ASAP
2002
IEEE
76views Hardware» more  ASAP 2002»
15 years 10 months ago
A Component Architecture for FPGA-Based, DSP System Design
† Introducing FPGA components into DSP system implementations creates an assortment of challenges across system architecture and logic design. Recognizing that some of the greate...
Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakaji...
122
Voted
IJAOSE
2008
83views more  IJAOSE 2008»
15 years 5 months ago
PASSIM: a simulation-based process for the development of multi-agent systems
: This paper presents the Process for Agent Specification, Simulation and Implementation (PASSIM), a simulation-based development process for Multi-agent Systems (MASs), which was ...
Massimo Cossentino, Giancarlo Fortino, Alfredo Gar...
CAD
1998
Springer
15 years 4 months ago
CAD and the product master model
We develop an architecture for a product master model that federates CAD systems with downstream application processes for di erent feature views that are part of the design proce...
Christoph M. Hoffmann, Robert Joan-Arinyo