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RSP
2005
IEEE
107views Control Systems» more  RSP 2005»
15 years 3 months ago
Rapid Prototyping of Embedded Software Using Selective Formalism
Our software synthesis tool, CSP++, generates C++ source code from verifiable CSPm specifications, and includes a framework for runtime execution. Our technique of selective for...
John D. Carter, Ming Xu, William B. Gardner
IJCV
1998
121views more  IJCV 1998»
14 years 9 months ago
Continuous Time Matching Constraints for Image Streams
Corresponding image points of a rigid object in a discrete sequence of images fulfil the so-called multilinear constraint. In this paper the continuous time analogue of this const...
Kalle Åström, Anders Heyden
DATE
2009
IEEE
105views Hardware» more  DATE 2009»
15 years 4 months ago
UMTS MPSoC design evaluation using a system level design framework
Rapid design space exploration with accurate models is necessary to improve designer productivity at the electronic system level. We describe how to use a new event-based design f...
Douglas Densmore, Alena Simalatsar, Abhijit Davare...
ISCAS
2007
IEEE
144views Hardware» more  ISCAS 2007»
15 years 4 months ago
Quasi-Resonant Interconnects: A Low Power Design Methodology
— Design and analysis guidelines for resonant interconnect networks are presented in this paper. The methodology focuses on developing an accurate analytic distributed model of t...
Jonathan Rosenfeld, Eby G. Friedman
TON
2010
136views more  TON 2010»
14 years 4 months ago
Distributed Opportunistic Scheduling With Two-Level Probing
Distributed opportunistic scheduling (DOS) is studied for wireless ad-hoc networks in which many links contend for the channel using random access before data transmissions. Simpl...
P. S. Chandrashekhar Thejaswi, Junshan Zhang, Man-...