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» A Case for MLP-Aware Cache Replacement
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79
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ISLPED
2010
ACM
229views Hardware» more  ISLPED 2010»
14 years 9 months ago
An energy efficient cache design using spin torque transfer (STT) RAM
The on-chip memory is a dominant source of power and energy consumption in modern and future processors. This paper explores the use of a new emerging non-volatile memory technolo...
Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatte...
INFOCOM
2007
IEEE
15 years 3 months ago
The Cache Inference Problem and its Application to Content and Request Routing
— In many networked applications, independent caching agents cooperate by servicing each other’s miss streams, without revealing the operational details of the caching mechanis...
Nikolaos Laoutaris, Georgios Zervas, Azer Bestavro...
83
Voted
IEEEPACT
2008
IEEE
15 years 4 months ago
Adaptive insertion policies for managing shared caches
Chip Multiprocessors (CMPs) allow different applications to concurrently execute on a single chip. When applications with differing demands for memory compete for a shared cache, ...
Aamer Jaleel, William Hasenplaugh, Moinuddin K. Qu...
SPIRE
2005
Springer
15 years 3 months ago
Cache-Conscious Collision Resolution in String Hash Tables
In-memory hash tables provide fast access to large numbers of strings, with less space overhead than sorted structures such as tries and binary trees. If chains are used for collis...
Nikolas Askitis, Justin Zobel
IEEEPACT
2008
IEEE
15 years 4 months ago
Characterizing and modeling the behavior of context switch misses
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...
Fang Liu, Fei Guo, Yan Solihin, Seongbeom Kim, Abd...