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» A Case for MLP-Aware Cache Replacement
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ISCA
2005
IEEE
90views Hardware» more  ISCA 2005»
15 years 5 months ago
Optimizing Replication, Communication, and Capacity Allocation in CMPs
Chip multiprocessors (CMPs) substantially increase capacity pressure on the on-chip memory hierarchy while requiring fast access. Neither private nor shared caches can provide bot...
Zeshan Chishti, Michael D. Powell, T. N. Vijaykuma...
TC
2002
14 years 11 months ago
Multiversion Data Broadcast
Broadcasting provides an efficient means for disseminating information in both wired and wireless setting. In this paper, we propose a suite of broadcast organization schemes for ...
Evaggelia Pitoura, Panos K. Chrysanthis
ICDCS
2008
IEEE
15 years 6 months ago
PFC: Transparent Optimization of Existing Prefetching Strategies for Multi-Level Storage Systems
The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit the sequentia...
Zhe Zhang, Kyuhyung Lee, Xiaosong Ma, Yuanyuan Zho...
CASES
2006
ACM
15 years 5 months ago
Adaptive and flexible dictionary code compression for embedded applications
Dictionary code compression is a technique where long instructions in the memory are replaced with shorter code words used as index in a table to look up the original instructions...
Mats Brorsson, Mikael Collin
FPL
2005
Springer
131views Hardware» more  FPL 2005»
15 years 5 months ago
An Efficient Approach to Hide the Run-Time Reconfiguration from SW Applications
Dynamically reconfigurable logic is becoming an important design unit in SoC system. A method to make the reconfiguration management transparent to software applications is requir...
Yang Qu, Juha-Pekka Soininen, Jari Nurmi