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ICCD
1992
IEEE
126views Hardware» more  ICCD 1992»
15 years 1 months ago
High-Level State Machine Specification and Synthesis
Current synthesis methodologies based on hardwaredescription languages focus mainly on two distinct levels: behavior and register-transfer levels. In many practical cases, however...
Andreas Kuehlmann, Reinaldo A. Bergamaschi
ASAP
2008
IEEE
105views Hardware» more  ASAP 2008»
14 years 11 months ago
Fast custom instruction identification by convex subgraph enumeration
Automatic generation of custom instruction processors from high-level application descriptions enables fast design space exploration, while offering very favorable performance and...
Kubilay Atasu, Oskar Mencer, Wayne Luk, Can C. &Ou...
MASCOTS
2007
14 years 11 months ago
Adaptive Sampling for Efficient MPSoC Architecture Simulation
—Modern micro-architecture simulators are many orders of magnitude slower than the hardware they simulate. The use of multiprocessor architectures for supporting future mobile an...
Melhem Tawk, Khaled Z. Ibrahim, Smaïl Niar
79
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CORR
2010
Springer
142views Education» more  CORR 2010»
14 years 8 months ago
Budget Feasible Mechanisms
We study a novel class of mechanism design problems in which the outcomes are constrained by the payments. This basic class of mechanism design problems captures many common econom...
Christos H. Papadimitriou, Yaron Singer
CEE
2007
110views more  CEE 2007»
14 years 9 months ago
HW/SW co-design for public-key cryptosystems on the 8051 micro-controller
It is a challenge to implement large word length public-key algorithms on embedded systems. Examples are smartcards, RF-ID tags and mobile terminals. This paper presents a HW/SW c...
Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid...