In this work, we provide a technique for efficiently exploring the configuration space of a parameterized system-on-a-chip (SOC) architecture to find all Pareto-optimal configurat...
: We address the issue of standards development for the system-level design space. System-level design IP re-use standards are key to the future of the VSIA. However, the concept o...
Christopher K. Lennard, Patrick Schaumont, Gjalt G...
: This paper presents a novel approach to efficiently perform early system level design space exploration (DSE) of MultiProcessor System-on-Chip (MPSoC) based embedded systems. By...
This paper presents a system level design methodology and its implementation as CAD tool for the optimization of heterogeneous multiprocessor systems. These heterogeneous systems,...
As modern embedded systems become more integrated and complex, it is crucial to be able to represent systems ple levels of abstraction, so that the design space can be effectively...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...