What does a ‘normal’ computer (or social) network look like? How can we spot ‘abnormal’ sub-networks in the Internet, or web graph? The answer to such questions is vital f...
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...
Jaskirat Singh, Zhi-Quan Luo, Sachin S. Sapatnekar
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...
We investigate the use of distributed measurements for estimating and updating the performance of a cellular system. Specifically, we discuss the number and placement of sensors in...
Liang Xiao, Larry J. Greenstein, Narayan B. Manday...