881 search results - page 8 / 177 » A Communication Interface for Multiprocessor Signal Processi... |
ASPLOS
1996
ACM
15 years 1 months ago
1996
ACM
This paper describes the synchronization and communication primitives of the Cray T3E multiprocessor, a shared memory system scalable to 2048 processors. We discuss what we have l...
103
click to vote
CCECE
2006
IEEE
15 years 3 months ago
2006
IEEE
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
FPL
2007
Springer
15 years 3 months ago
2007
Springer
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
84
Voted
HICSS
2006
IEEE
15 years 3 months ago
2006
IEEE
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
DAC
2000
ACM
15 years 10 months ago
2000
ACM
The Esprit/OMI-COSY project defines transaction-levels to set-up the exchange of IP's in separating function from architecture and body-behavior from proprietary interfaces. ...