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ISPASS
2009
IEEE
15 years 11 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
ISPASS
2007
IEEE
15 years 11 months ago
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
Matt T. Yourst
117
Voted
EUROPKI
2007
Springer
15 years 11 months ago
E-Passports as a Means Towards the First World-Wide Public Key Infrastructure
Millions of citizens around the world have already acquired their new electronic passport. The e-passport is equipped with contactless communication capability, as well as with a s...
Dimitrios Lekkas, Dimitris Gritzalis
SC
2005
ACM
15 years 10 months ago
The MHETA Execution Model for Heterogeneous Clusters
The availability of inexpensive “off the shelf” machines increases the likelihood that parallel programs run on heterogeneous clusters of machines. These programs are increasi...
Mario Nakazawa, David K. Lowenthal, Wenduo Zhou
127
Voted
INFOCOM
2002
IEEE
15 years 9 months ago
FPAC: Fast, Fixed-Cost Authentication for Access to Reserved Resources
—Enhanced network services often involve allocating resources (bandwidth/buffer space) preferentially to packets belonging to certain flows or traffic classes. Such services ar...
Kenneth L. Calvert, Srinivasan Venkatraman, Jim Gr...