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» A Compact Transactional Memory Multiprocessor System on FPGA
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ASPDAC
2006
ACM
99views Hardware» more  ASPDAC 2006»
15 years 3 months ago
Programmable numerical function generators based on quadratic approximation: architecture and synthesis method
— This paper presents an architecture and a synthesis method for programmable numerical function generators (NFGs) for trigonometric, logarithmic, square root, and reciprocal fun...
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
DSN
2000
IEEE
15 years 1 months ago
Data Replication Strategies for Fault Tolerance and Availability on Commodity Clusters
Recent work has shown the advantages of using persistent memory for transaction processing. In particular, the Vista transaction system uses recoverable memory to avoid disk I/O, ...
Cristiana Amza, Alan L. Cox, Willy Zwaenepoel
RTAS
2006
IEEE
15 years 3 months ago
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors
Multiprocessor systems present serious challenges in the design of real-time systems due to the wider variation of execution time of an instruction sequence compared to a uniproce...
Jae W. Lee, Krste Asanovic
IPPS
2000
IEEE
15 years 1 months ago
Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
Jim Nilsson, Fredrik Dahlgren
ICPP
2009
IEEE
14 years 7 months ago
A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication
This paper introduces a new highly optimized architecture for remote memory access (RMA). RMA, using put and get operations, is a one-sided communication function which amongst ot...
Mondrian Nüssle, Martin Scherer, Ulrich Br&uu...